Reset Handling for UVM
The Universal Verification Methodology has been light on how to handle on-the-fly reset throughout an environment.
Multiple articles attempt through various strategies. A good reset strategy must be able to handle disruptive resets at any time in a simulation. Furthermore, the strategy must handle drivers, monitors, sequences, virtual sequences and scoreboards well.
This page collects all articles with some fast notes, but without qualitative commentary.
Is this page missing a paper? Contact me through any of the means at the bottom of this page.
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Verification Horizons (Mark Peryer): On the fly
reset
- Driver and monitor use an FSM approach.
- Reset is distributed through signal is inside the sequence item.
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CFS Vision (Christian Slav): How to handle reset in UVM
- Driver and monitor use the process class to handle reset.
- Reset is distributed through a function call.
- Appears to be similar to the APB agent by AMIQ Consulting.
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SNUG 2013 Silicon Valley (Brian Hunter, Ben Chen, Rebecca Lipon): Reset Testing Made Simple with UVM Phases
- Driver and monitor use the process class to handle reset.
- Reset is distributed through a function call.
- Appears to be similar to the APB agent by AMIQ Consulting.
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DVCon 2012 2.2 (Muralidhara Ramalingaiah, Boobalan Anantharaman): OVM & UVM Techniques for On-the-fly Reset
- Also known as the Cypress paper.
- Driver and monitor use an FSM to handle reset and implement the reset_phase method.
- Reset is distributed through an UVM event and phase jump.
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DVCon 2014 1P.7 (Courtney Schmitt, Phu Huynh, Stephanie McInnis, Uwe Simm): Resetting Anytime with the Cadence UVM Reset Package
- Reset is distributed through the Cadence uvm_thread.
- Not sure how driver and monitor handle reset.
- Uses the Cadence Reset Package