Reactive Agents for UVM
The Universal Verification Methodology is light on how to handle reactive drivers.
The integrated UBus example in UVM 1.1 from 2011 shows one way of handling reactive stimulus, but without explaining why. IEEE UVM from 2017 and onwards has dropped all example code. This page collects all articles on reactive agents with some fast notes, but without qualitative commentary.
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Verification Academy: Sequences/Slave
- Shows two approaches: A single sequence item version and a version with a request/response pair of sequence items.
- Both approaches use two tlm transactions per bus level transaction multiplexed on the same TLM channel.
- Both approaches use a single TLM channel between driver and sequencer.
SNUG Germany 2016 (Jeff Montesano, Mark Litterick): Mastering Reactive Slaves in UVM
- Explains two types of reactive agents. Goes into detail with one approach.
- Uses a TLM analysis port from monitor to sequencer to collect request information.
- Sequencer contains a TLM analysis FIFO.
- UVM 1.1 to 1.2 Ubus integrated example
DVCon 2020 (Clifford E. Cummings, Heath Chambers, Stephen D'Onofrio): UVM Reactive Stimulus Techniques
- Discusses reactive sequences in UVM.
- Does not discuss reactive agents.